The present invention relates to a method for producing an integrated circuit device and more particularly relates to a method for producing an integrated circuit device in which circuit cross talk is minimized by using a low dielectric constant coating material.
Cross talk between top layer metal interconnect lines of a semiconductor device can be caused by a high dielectric constant material filling the space between two metal lines. The plastic material commonly used for packaging of integrated circuits normally has a dielectric constant of between 6 and 8. As moisture penetrates the plastic material, the dielectric constant of the material increases. A higher dielectric constant increases the likelihood of capacitive coupling between adjacent metal lines.
Cross talk and capacitive effects between metal lines in a semiconductor chip are becoming greater problems with shrinking geometries and increasing chip speeds. Many of the attendant problems are difficult to model and will inexplicably show up as errors.
In accordance with the present invention, a method for minimizing circuit cross talk between adjacent metal lines in an integrated circuit device is provided. This method employs the application of a low dielectric constant material over the passivation layer of an integrated circuit semiconductor device.
It is accordingly an object of the present invention to provide a method for minimizing cross talk between adjacent metal lines in an integrated circuit device.
It is another object of the present invention to provide a method for minimizing cross talk in an integrated circuit having a passivation layer by applying a low dielectric constant material over the passivation layer.
Another object is to provide a method for minimizing cross talk in an integrated circuit which includes the steps of applying a low dielectric constant material to the integrated circuit and curing the resulting structure by heating in a suitable atmosphere.